(1) Field of the Invention
The present invention relates to an error detecting circuit of a system time clock (STC), and more particularly, to an error detecting circuit of a system time clock for a moving picture experts group 2 (MPEG2) system decoder.
(2) Description of the Prior Art
In view of the current technical trend toward digitalizing information, an image compression technology is important as a basis for the development of multimedia technology.
Under these technical environments, and in view of the fact that an international standard for compressing a digital signal of a moving picture image is essential in the field of multimedia, a moving picture experts group (MPEG) standard has developed as an international standard.
The MPEG standard relates to video and audio systems wherein a digital video signal is compressed using an MPEG standardized video algorithm, a digital audio signal is compressed using an MPEG standardized audio algorithm, and synchronizing and multiplexing the bit stream of compressed video and audio signals.
The MPEG has the basic frame compression features of the joint photograph experts group (JPEG) standard, but has an additional function of deleting time duplexity among frames. The JPEG standard is one of the proposed standards in the technology of static picture compressing. The MPEG-2 standard is prominent among MPEG standards, and is capable of providing a high resolution image at the level of high definition television (HDTV). Accordingly, many technical developments are currently directed to MPEG-2 systems and decoder chips for MPEG-2 video/audio systems.
The present invention specifically relates to an MPEG-2 system decoder.
According to international standard draft no. 13818 prepared by International Standard Organization(ISO)/International Electrotechnical Conference(IEC), synchronizing each elementary stream in a transport stream is carried out on the basis of a program clock reference(PCR) and a system time clock(STC).
The system time clock is obtained by means of a counter which counts a clock signal of a certain frequency, for example, 27 MHz. The STC is used on both an encoder side and a decoder side of a transport stream, and the STC of an encoder is required to be synchronized with the STC of a decoder.
In order to satisfy this requirement, the STC values of an encoder are sampled out as PCRs at constant time intervals, which are then transferred through the transport stream.
On the decoder side of the transport stream, the STC of a decoder is synchronized with the STC of an encoder by means of the PCRs which are transferred as described above.
For the purpose of the synchronizing operation, there should be provided an error detecting circuit on the decoder side, by which an error is detected between a current STC and the PCR from the transport stream and then the STC of the decoder is revised with reference to the error.